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43 bytes removed ,  17:13, 15 May 2018
m
Actually correct this.
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These registers are used to access the system [[Flash_Filesystem|NAND]] and the inserted SD card. Both devices use the same interface. Despite the bus clock of the ARM9 being double of the DSi in 3DS mode the SDMMC controller has HCLK=33.513982 MHz.
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These registers are used to access the system [[Flash_Filesystem|NAND]] and the inserted SD card. Both devices use the same interface. HCLK of the SDMMC controller is 67.027964 MHz (double of the DSi HCLK).
    
=Registers=
 
=Registers=
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