− | The register storage layout is as follows (referring to user-mode registers): r0-r12, <event-signaling exception handler>, lr_svc, sp, lr, pc (misadjusted for Thumb instructions), cpsr. | + | The register storage layout is as follows (referring to user-mode registers): r0-r12, sp, <event-signaling exception handler>, lr_svc, lr, pc (misadjusted for Thumb instructions), cpsr. |