Difference between revisions of "GSPGPU:WriteHWRegs"
Jump to navigation
Jump to search
m |
|||
Line 15: | Line 15: | ||
|- | |- | ||
| 3 | | 3 | ||
− | | (Size<<14) <nowiki>|</nowiki> 2 | + | | {{IPC/TranslationDescriptor|(Size<<14) <nowiki>|</nowiki> 2}} |
|- | |- | ||
| 4 | | 4 |
Revision as of 22:20, 2 February 2016
Request
Index Word | Description |
---|---|
0 | Header code [0x00010082] |
1 | GPU address based at 0x1EB00000, must be word-aligned |
2 | Size, must be <=0x80 and word-aligned |
3 | Translation descriptor: (Size<<14) | 2 |
4 | Data pointer |
Response
Index Word | Description |
---|---|
0 | Header code |
1 | Result code |
Description
This writes the input data to the specified GPU register address. The GPU register offset must be <0x420000.