Line 39: |
Line 39: |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
− | | [[#PXI_SYNC|PXI_SYNC]]9 | + | | [[#PXI_SYNC9|PXI_SYNC9]] |
| | 0x10008000 | | | 0x10008000 |
| | 4 | | | 4 |
Line 57: |
Line 57: |
| |- | | |- |
| | style="background: green" | Yes | | | style="background: green" | Yes |
− | | PXI_RECV_FIFO9 | + | | PXI_RECV9 |
| | 0x10008008 | | | 0x10008008 |
| | 4 | | | 4 |
Line 63: |
Line 63: |
| |-style="border-top: double" | | |-style="border-top: double" |
| | style="background: green" | Yes | | | style="background: green" | Yes |
− | | [[#PXI_SYNC|PXI_SYNC]]11 | + | | PXI_SYNC11 |
| | 0x10163000 | | | 0x10163000 |
| | 4 | | | 4 |
Line 89: |
Line 89: |
| The PXI registers are similar to those on DS. | | The PXI registers are similar to those on DS. |
| | | |
− | == PXI_SYNC == | + | == PXI_SYNC9 == |
| {| class="wikitable" border="1" | | {| class="wikitable" border="1" |
| ! Bit | | ! Bit |
Line 95: |
Line 95: |
| ! Description | | ! Description |
| |- | | |- |
− | | 0-3 | + | | 0-8 |
| | R | | | R |
− | | Data input from PXI_SYNC Bit8-11 of remote CPU (00h..0Fh) | + | | Data input from bit8-15 of PXI_SYNC11 |
| |- | | |- |
− | | 8-11 | + | | 8-15 |
| | R/W | | | R/W |
− | | Data output to PXI_SYNC Bit0-3 of remote CPU (00h..0Fh) | + | | Data output to bit0-8 of PXI_SYNC11 |
| |- | | |- |
− | | 13 | + | | 23 |
− | | W | + | | ? |
− | | Send IRQ to remote CPU (0=None, 1=Send IRQ) | + | | ? |
| |- | | |- |
− | | 14 | + | | 29 |
− | | R/W | + | | ? |
− | | Enable IRQ from remote CPU (0=Disable, 1=Enable) | + | | ? |
| |- | | |- |
− | | 23 | + | | 31 |
| | ? | | | ? |
| | ? | | | ? |