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Line 189:
Line 189: − Bit0-3: Enable SPI bus.+ + + + + + + + + + + + + + + + − + − 0-1 Master (0=ARM9?, 1=ARM11?, 2 or 3=DSP/code)+ − 2-4 Offset (0..7) (slot 0..7) (LSB of address in 32Kbyte units)+ − 5-6 Not used (0)+ − 7 Enable (0=Disable, 1=Enable)+ + + + + + + + + + + + + − 0-1 Master (0=ARM9?, 1=ARM11?, 2 or 3=DSP/data)+ − 2-4 Offset (0..7) (slot 0..7) (LSB of address in 32Kbyte units)+ − 5-6 Not used (0)+ − 7 Enable (0=Disable, 1=Enable)+ + + + + + + + + + + + +
no edit summary
== PDN_SPI_CNT ==
== PDN_SPI_CNT ==
{| class="wikitable" border="1"
! Bit
! Description
|-
| 0
| Enable [[SPI Registers]] 0x10160000.
|-
| 1
| Enable [[SPI Registers]] 0x10142000.
|-
| 2
| Enable [[SPI Registers]] 0x10143800.
|-
| 3
| Unknown
|}
== PDN_SHAREDWRAM_32K_DATA ==
== PDN_SHAREDWRAM_32K_DATA ==
Used for mapping 32K chunks of shared WRAM for DSP code.
Used for mapping 32K chunks of shared WRAM for DSP data.
{| class="wikitable" border="1"
! Bits
! Description
|-
| 0-1
| Master (0=ARM9?, 1=ARM11?, 2 or 3=DSP/data)
|-
| 2-4
| Offset (0..7) (slot 0..7) (LSB of address in 32Kbyte units)
|-
| 5-6
| Not used (0)
|-
| 7
| Enable (0=Disable, 1=Enable)
|}
== PDN_SHAREDWRAM_32K_CODE ==
== PDN_SHAREDWRAM_32K_CODE ==
Used for mapping 32K chunks of shared WRAM for DSP data.
Used for mapping 32K chunks of shared WRAM for DSP data.
{| class="wikitable" border="1"
! Bits
! Description
|-
| 0-1
| Master (0=ARM9?, 1=ARM11?, 2 or 3=DSP/code)
|-
| 2-4
| Offset (0..7) (slot 0..7) (LSB of address in 32Kbyte units)
|-
| 5-6
| Not used (0)
|-
| 7
| Enable (0=Disable, 1=Enable)
|}
==PDN_WIFI_CNT==
==PDN_WIFI_CNT==