ARM7 Registers - Revision history

Merry at 11:39, 12 April 2021

2021-04-12T09:39:27Z

← Older revision		Revision as of 13:39, 12 April 2021
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	===ARM7_CODE===		===ARM7_CODE===
	This region is an arm7 bootrom overlay, over the vector table at address 0. Once the ARM7 is taken out of reset by <code>TwlProcess9</code>, the reset vector will be jumped to, beginning execution. <code>TwlProcess9</code> uses this to put ARM7 in a loop (TWL), and to set the <code>POSTFLG</code> and branch to more copied code (GBA). Execution is started by writing <code>0x8001</code> to [[~~CONFIG11_Registers~~#~~CFG11_TWLMODE_0~~\|~~CFG11_TWLMODE_0~~]] after setting the mode via <code>ARM7_CNT</code>. Later, this overlay is disabled by the ARM7 via the "biosprot" register (0x04000308).		This region is an arm7 bootrom overlay, over the vector table at address 0. Once the ARM7 is taken out of reset by <code>TwlProcess9</code>, the reset vector will be jumped to, beginning execution. <code>TwlProcess9</code> uses this to put ARM7 in a loop (TWL), and to set the <code>POSTFLG</code> and branch to more copied code (GBA). Execution is started by writing <code>0x8001</code> to [[PDN_Registers#LGY_MODE\|LGY_MODE]] after setting the mode via <code>ARM7_CNT</code>. Later, this overlay is disabled by the ARM7 via the "biosprot" register (0x04000308).

	Reading uninitialized data in this 32-byte region leads to both screens displaying solid green (exception), and the CPU locking up.		Reading uninitialized data in this 32-byte region leads to both screens displaying solid green (exception), and the CPU locking up.

Owowhatsthis: Fix ARM7 AGB-related info

2020-05-24T19:59:11Z

Fix ARM7 AGB-related info

Show changes

Dark samus at 06:24, 8 June 2019

2019-06-08T04:24:27Z

← Older revision		Revision as of 08:24, 8 June 2019
Line 68:		Line 68:

	===ARM7_CODE===		===ARM7_CODE===
	This region is an arm7 bootrom overlay, over the vector table at address 0. Once the ARM7 is taken out of reset by <code>TwlProcess9</code>, the reset vector will be jumped to, beginning execution. <code>TwlProcess9</code> uses this to put ARM7 in a loop (TWL), and to set the <code>POSTFLG</code> and branch to more copied code (GBA). Execution is started by writing <code>0x8001</code> to [[CONFIG11_Registers#CFG11_TWLMODE_0\|CFG11_TWLMODE_0]]. Later, this overlay is disabled by the ARM7 via the "biosprot" register (0x04000308).		This region is an arm7 bootrom overlay, over the vector table at address 0. Once the ARM7 is taken out of reset by <code>TwlProcess9</code>, the reset vector will be jumped to, beginning execution. <code>TwlProcess9</code> uses this to put ARM7 in a loop (TWL), and to set the <code>POSTFLG</code> and branch to more copied code (GBA). Execution is started by writing <code>0x8001</code> to [[CONFIG11_Registers#CFG11_TWLMODE_0\|CFG11_TWLMODE_0]] after setting the mode via <code>ARM7_CNT</code>. Later, this overlay is disabled by the ARM7 via the "biosprot" register (0x04000308).

	Reading uninitialized data in this 32-byte region leads to both screens displaying solid green (exception), and the CPU locking up.		Reading uninitialized data in this 32-byte region leads to both screens displaying solid green (exception), and the CPU locking up.

Dark samus at 06:13, 8 June 2019

2019-06-08T04:13:10Z

← Older revision		Revision as of 08:13, 8 June 2019
Line 68:		Line 68:

	===ARM7_CODE===		===ARM7_CODE===
	This is the ~~first~~ code ~~that~~ will be ~~run after~~ execution ~~begins~~. <code>TwlProcess9</code> uses this to put ARM7 in a loop (TWL), and to set the <code>POSTFLG</code> and branch to more copied code (GBA). ~~This doesn't seem~~ to ~~start execution~~ by ~~itself~~.		This region is an arm7 bootrom overlay, over the vector table at address 0. Once the ARM7 is taken out of reset by <code>TwlProcess9</code>, the reset vector will be jumped to, beginning execution. <code>TwlProcess9</code> uses this to put ARM7 in a loop (TWL), and to set the <code>POSTFLG</code> and branch to more copied code (GBA). Execution is started by writing <code>0x8001</code> to [[CONFIG11_Registers#CFG11_TWLMODE_0\|CFG11_TWLMODE_0]]. Later, this overlay is disabled by the ARM7 via the "biosprot" register (0x04000308).

	Reading uninitialized data in this 32-byte region leads to both screens displaying solid green (exception), and the CPU locking up.		Reading uninitialized data in this 32-byte region leads to both screens displaying solid green (exception), and the CPU locking up.

Riley at 02:02, 30 December 2017

2017-12-30T01:02:48Z

← Older revision		Revision as of 04:02, 30 December 2017
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	* <code>0x08060000</code> → <code>0x03800000</code>, ARM7 WRAM (64KiB)		* <code>0x08060000</code> → <code>0x03800000</code>, ARM7 WRAM (64KiB)
	* <code>0x080B0000</code> → <code>0x03000000</code>, GBA IWRAM (32KiB)		* <code>0x080B0000</code> → <code>0x03000000</code>, GBA IWRAM (32KiB)
	* <code>0x08080000</code> → EEPROM/SRAM/Flash 512k/Flash 1Mbit (the 2 512k banks are contiguous in memory). <code>0x10018104</code> must be set to 1 before reading memory here, and restored to its previous value afterwards		* <code>0x08080000</code> → EEPROM/SRAM/Flash 512k/Flash 1Mbit (the 2 512k banks are contiguous in memory). Appears to be mirrored at <code>0x080C0000</code>, maybe first mapping is read-only and second is writable? <code>0x10018104</code> must be set to 1 before reading memory here, and restored to its previous value afterwards
	* <code>0x01FFC000</code> → <code>0x01000000</code>, ARM9 ITCM under TWL (16KiB)		* <code>0x01FFC000</code> → <code>0x01000000</code>, ARM9 ITCM under TWL (16KiB)

Riley: document 0x10018110/0x10018114

2017-12-28T13:56:21Z

document 0x10018110/0x10018114

← Older revision		Revision as of 16:56, 28 December 2017
Line 40:		Line 40:
	\| <code>u32</code>		\| <code>u32</code>
	\| <code>0x10018110</code>		\| <code>0x10018110</code>
	\| <code>?</code>		\| <code>ARM7_RTC_VAL_LO</code>
	\| 4		\| 4
	\|-		\|-
	\| <code>u32</code>		\| <code>u32</code>
	\| <code>0x10018114</code>		\| <code>0x10018114</code>
	\| <code>?</code>		\| <code>ARM7_RTC_VAL_HI</code>
	\| 4		\| 4
	\|-		\|-
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	===ARM7_SAVE_MODE===		===ARM7_SAVE_MODE===
	This tells the save storage emulation hardware which device type to emulate (64k EEPROM, a 512k Flash chip model, and SRAM are all that have been used officially; several other 512k Flash chip models, two 1 Mbit Flash chip models and 8k EEPROM are also supported). This comes directly from the [[3DS_Virtual_Console#Footer\|ROM footer]].		This tells the save storage emulation hardware which device type to emulate (64k EEPROM, a 512k Flash chip model, and SRAM are all that have been used officially; several other 512k Flash chip models, two 1 Mbit Flash chip models and 8k EEPROM are also supported). This comes directly from the [[3DS_Virtual_Console#Footer\|ROM footer]].

			===ARM7_RTC_VAL===
			These registers are set to the current LgyP9 date+time before ARM7_RTC_CNT/ARM7_RTC_? registers are used.
			They contain the following structure, set up on the stack then both u32 registers are written one after the other:

			s8 year_since_2000_bcd;
			s8 month_bcd;
			s8 day_bcd;
			s8 day_of_week;
			s8 hour_bcd;
			s8 minute_bcd;
			s8 second_bcd;

	===ARM7_RTC ''?''===		===ARM7_RTC ''?''===

AuroraWright at 16:18, 12 September 2017

2017-09-12T14:18:57Z

← Older revision		Revision as of 18:18, 12 September 2017
Line 73:		Line 73:

	===ARM7_SAVE_MODE===		===ARM7_SAVE_MODE===
	This tells the save storage emulation hardware which device type to emulate (64k EEPROM, a 512k Flash chip model, and SRAM are all that have been used officially; several other 512k Flash chip models, two ~~Flash~~ 1 Mbit ~~chips~~ models and 8k EEPROM are also supported). This comes directly from the [[3DS_Virtual_Console#Footer\|ROM footer]].		This tells the save storage emulation hardware which device type to emulate (64k EEPROM, a 512k Flash chip model, and SRAM are all that have been used officially; several other 512k Flash chip models, two 1 Mbit Flash chip models and 8k EEPROM are also supported). This comes directly from the [[3DS_Virtual_Console#Footer\|ROM footer]].

	===ARM7_RTC ''?''===		===ARM7_RTC ''?''===

AuroraWright at 16:17, 12 September 2017

2017-09-12T14:17:07Z

← Older revision		Revision as of 18:17, 12 September 2017
Line 73:		Line 73:

	===ARM7_SAVE_MODE===		===ARM7_SAVE_MODE===
	This tells the save storage emulation hardware which device type to emulate (EEPROM, 512k ~~flash~~, and SRAM are all that have been used officially; 1 Mbit ~~flash is~~ supported ~~but not implemented in AGB_FIRM~~). This comes directly from the [[3DS_Virtual_Console#Footer\|ROM footer]].		This tells the save storage emulation hardware which device type to emulate (64k EEPROM, a 512k Flash chip model, and SRAM are all that have been used officially; several other 512k Flash chip models, two Flash 1 Mbit chips models and 8k EEPROM are also supported). This comes directly from the [[3DS_Virtual_Console#Footer\|ROM footer]].

	===ARM7_RTC ''?''===		===ARM7_RTC ''?''===

AuroraWright: Fix save chips memory mapping (verified with memory dump)

2017-09-08T20:15:54Z

Fix save chips memory mapping (verified with memory dump)

← Older revision		Revision as of 00:15, 9 September 2017
Line 90:		Line 90:
	* <code>0x08060000</code> → <code>0x03800000</code>, ARM7 WRAM (64KiB)		* <code>0x08060000</code> → <code>0x03800000</code>, ARM7 WRAM (64KiB)
	* <code>0x080B0000</code> → <code>0x03000000</code>, GBA IWRAM (32KiB)		* <code>0x080B0000</code> → <code>0x03000000</code>, GBA IWRAM (32KiB)
	* <code>0x08080000</code> → Flash 1Mbit (the 2 512k banks are contiguous in memory)		* <code>0x08080000</code> → EEPROM/SRAM/Flash 512k/Flash 1Mbit (the 2 512k banks are contiguous in memory). <code>0x10018104</code> must be set to 1 before reading memory here, and restored to its previous value afterwards
	* <code>0x080C0000</code> → EEPROM/SRAM/Flash 512k (<code>0x10018104</code> must be set to 1 before reading memory here, and restored to its previous value afterwards)
	* <code>0x01FFC000</code> → <code>0x01000000</code>, ARM9 ITCM under TWL (16KiB)		* <code>0x01FFC000</code> → <code>0x01000000</code>, ARM9 ITCM under TWL (16KiB)

AuroraWright at 20:01, 8 September 2017

2017-09-08T18:01:42Z

← Older revision		Revision as of 22:01, 8 September 2017
Line 90:		Line 90:
	* <code>0x08060000</code> → <code>0x03800000</code>, ARM7 WRAM (64KiB)		* <code>0x08060000</code> → <code>0x03800000</code>, ARM7 WRAM (64KiB)
	* <code>0x080B0000</code> → <code>0x03000000</code>, GBA IWRAM (32KiB)		* <code>0x080B0000</code> → <code>0x03000000</code>, GBA IWRAM (32KiB)
	* <code>0x080C0000</code> → EEPROM/SRAM/Flash (<code>0x10018104</code> must be set to 1 before reading memory here, and restored to its previous value afterwards)
	* <code>0x08080000</code> → Flash 1Mbit (the 2 512k banks are contiguous in memory)		* <code>0x08080000</code> → Flash 1Mbit (the 2 512k banks are contiguous in memory)
			* <code>0x080C0000</code> → EEPROM/SRAM/Flash 512k (<code>0x10018104</code> must be set to 1 before reading memory here, and restored to its previous value afterwards)
	* <code>0x01FFC000</code> → <code>0x01000000</code>, ARM9 ITCM under TWL (16KiB)		* <code>0x01FFC000</code> → <code>0x01000000</code>, ARM9 ITCM under TWL (16KiB)