Memory layout - Revision history

TuxSH: /* ARM11 */

2021-01-27T21:04:52Z

ARM11

← Older revision		Revision as of 00:04, 28 January 2021
Line 33:		Line 33:
	\| 0x17E10000		\| 0x17E10000
	\| 0x00001000		\| 0x00001000
	\| L2C-310 Level 2 Cache Controller (2MB)		\| L2C-310 r3p3 Level 2 Cache Controller (2MB)
	\|-		\|-
	\| style="background: green" \| Yes		\| style="background: green" \| Yes

TuxSH: /* 0x1F000000 (New 3DS only) */

2020-12-10T22:30:10Z

0x1F000000 (New 3DS only)

← Older revision		Revision as of 01:30, 11 December 2020
Line 84:		Line 84:

	=== <code>0x1F000000</code> ([[New 3DS]] only) ===		=== <code>0x1F000000</code> ([[New 3DS]] only) ===
	This area is used by [[QTM Services]],starting at offset <code>0x200000</code>, size <code>0x180000</code>. This area is not accessible to the GPU on the old 3DS. The old 3DS and New 3DS GSP module has <code>vaddr->physaddr</code> conversion code for this entire region. On the New 3DS, only the first <code>0x200000</code> bytes (half of this memory) are accessible to the GPU.		This area is used by [[QTM Services]] and Kernel11,starting at offset <code>0x200000</code>, size <code>0x180000</code>. This area is not accessible to the GPU on the old 3DS. The old 3DS and New 3DS GSP module has <code>vaddr->physaddr</code> conversion code for this entire region. On the New 3DS, only the first <code>0x200000</code> bytes (half of this memory) are accessible to the GPU.

	== ARM9 ==		== ARM9 ==

TuxSH: Dev2 /* FCRAM memory-regions layout */

2020-05-08T22:47:12Z

Dev2 FCRAM memory-regions layout

← Older revision		Revision as of 02:47, 9 May 2020
Line 638:		Line 638:
	FCRAM is partitioned into three regions of memory (APPLICATION, SYSTEM, and BASE). Most applications can only allocate memory from one of these regions (which is encoded in the [[NCCH/Extended_Header#ARM11_Kernel_Flags\|process kernel flags]]). There is a fixed set of possible size of each memory region, determined by the APPMEMTYPE value in [[Configuration_Memory#APPMEMTYPE\|configuration memory]] (which in turn is set up according to the [[FIRM#FIRM_Launch_Parameters\|firmware launch parameters]]).		FCRAM is partitioned into three regions of memory (APPLICATION, SYSTEM, and BASE). Most applications can only allocate memory from one of these regions (which is encoded in the [[NCCH/Extended_Header#ARM11_Kernel_Flags\|process kernel flags]]). There is a fixed set of possible size of each memory region, determined by the APPMEMTYPE value in [[Configuration_Memory#APPMEMTYPE\|configuration memory]] (which in turn is set up according to the [[FIRM#FIRM_Launch_Parameters\|firmware launch parameters]]).

	Support for APPMEMTYPEs 6 and 7 was implemented in [[NS]] with [[8.0.0-18]]. These configurations are only supported in the [[New_3DS]] ARM11-kernel, and are in fact the only ones supported there at all. Applications only get access to the larger memory regions when this is specified in their [[NCCH/Extended Header#New3DS System Mode\|extended header]].		Support for APPMEMTYPEs 6 and 7 (and 8?) was implemented in [[NS]] with [[8.0.0-18]]. These configurations are only supported in the [[New_3DS]] ARM11-kernel, and are in fact the only ones supported there at all. Applications only get access to the larger memory regions when this is specified in their [[NCCH/Extended Header#New3DS System Mode\|extended header]].

	{\| class="wikitable" border="1"		{\| class="wikitable" border="1"
Line 689:		Line 689:
	\| 0x01400000		\| 0x01400000
	\|-		\|-
	\| 6 (~~This~~ is the default on New3DS. With [[New_3DS]] kernel this is the type used when the value is ~~not~~ 7)		\| 6 and 8 (6 is the default on New3DS. With [[New_3DS]] kernel this is the type used when the value is neither 7 nor 8)
	\| 0x0		\| 0x0
	\| 0x07C00000(124MB)		\| 0x07C00000(124MB)

TuxSH: /* ARM11 */

2020-05-07T21:12:04Z

ARM11

← Older revision		Revision as of 01:12, 8 May 2020
Line 38:		Line 38:
	\| 0x18000000		\| 0x18000000
	\| 0x00600000		\| 0x00600000
	\| VRAM (divided in four banks)		\| VRAM (divided in two areas VRAM A and B, four banks in total)
	\|-		\|-
	\| style="background: red" \| No		\| style="background: red" \| No

TuxSH: VRAM

2020-05-07T20:46:02Z

VRAM

← Older revision		Revision as of 00:46, 8 May 2020
Line 38:		Line 38:
	\| 0x18000000		\| 0x18000000
	\| 0x00600000		\| 0x00600000
	\| VRAM (divided in ~~two~~ banks~~, VRAM and VRAMB~~)		\| VRAM (divided in four banks)
	\|-		\|-
	\| style="background: red" \| No		\| style="background: red" \| No

Wolfvak: /* ARM9 ITCM */

2017-07-28T19:55:23Z

ARM9 ITCM

← Older revision		Revision as of 23:55, 28 July 2017
Line 581:		Line 581:
	\| 0xB90		\| 0xB90
	\| Uninitialized memory.		\| Uninitialized memory.
	0x01FFFC00 ~~size~~ 0x100~~-bytes starting~~ with [[9.5.0-22\|9.5.0-X]] is the FIRM header used during FIRM-launching.		\|-
			\| 0x01FFFC00
			\|
			\| 0x7C00
			\| 0x100
			\| Starting with [[9.5.0-22\|9.5.0-X]] is the FIRM header used during FIRM-launching.
	\|}		\|}

Wolfvak: /* 0x17E10000 */

2017-07-24T20:14:41Z

0x17E10000

← Older revision		Revision as of 00:14, 25 July 2017
Line 80:		Line 80:
	* Writes value <code>0xFFFF</code> to 32-bit register <code>0x17E10000</code>+<code>0x77C</code>.		* Writes value <code>0xFFFF</code> to 32-bit register <code>0x17E10000</code>+<code>0x77C</code>.
	* Waits for bit 0 in 32-bit register <code>0x17E10000</code>+<code>0x730</code> to become clear.		* Waits for bit 0 in 32-bit register <code>0x17E10000</code>+<code>0x730</code> to become clear.
	* Writes value <code>0x0<code> to 32-bit register <code>0x17E10000</code>+<code>0x0</code>.		* Writes value <code>0x0</code> to 32-bit register <code>0x17E10000</code>+<code>0x0</code>.
	* Clears bit 0 in 32-bit register <code>0x17E10000</code>+<code>0x100</code>.		* Clears bit 0 in 32-bit register <code>0x17E10000</code>+<code>0x100</code>.

Myria: /* ARM9 ITCM */ Removed redundant OTP layout description.

2017-01-23T18:11:05Z

ARM9 ITCM: Removed redundant OTP layout description.

@@ Line 474: / Line 474: @@
 | 0x3800
 | 0x100
-| This is the first 0x90-bytes of plaintext [[OTP_Registers|OTP]] when OTP hash verification is successful. The remaining 0x70-bytes are cleared.
+| This is the first 0x90 bytes of [[OTP_Registers#Plaintext_OTP|plaintext OTP]] when OTP hash verification is successful. The remaining 0x70 bytes are cleared.
 |-
 | 0x01FFB880
+|
-| 0x3880
+| 0x3890
-| 0x80
+| 0x70
-| This is all-zero.
+| This is all zeros; boot ROM does not reveal the console-specific keys or the OTP hash in ITCM.
 |-
 | 0x01FFB900

Yellows8: /* ARM9 ITCM */

2017-01-23T14:27:31Z

ARM9 ITCM

← Older revision		Revision as of 17:27, 23 January 2017
Line 510:		Line 510:
	\| 0x381A		\| 0x381A
	\| 0x6		\| 0x6
	\| Manufacturing date. Each byte is one field: year, month, day, hour, minute, second. Year is encoded as year-1900 so that it fits in one byte.		\| Manufacturing date. Usually month(s) before the dates in the logs stored in [[Flash_Filesystem\|TWLNAND]]. Each byte is one field: year, month, day, hour, minute, second. Year is encoded as year-1900 so that it fits in one byte.
	\|-		\|-
	\| 0x01FFB820		\| 0x01FFB820

Myria: /* ARM9 ITCM */ Manufacturing date

2017-01-23T06:04:00Z

ARM9 ITCM: Manufacturing date

← Older revision		Revision as of 09:04, 23 January 2017
Line 510:		Line 510:
	\| 0x381A		\| 0x381A
	\| 0x6		\| 0x6
	\| ?		\| Manufacturing date. Each byte is one field: year, month, day, hour, minute, second. Year is encoded as year-1900 so that it fits in one byte.
	\|-		\|-
	\| 0x01FFB820		\| 0x01FFB820